Cryptonight V7 Mining Bitstream for FPGA ( BCU 1525 / VCU 1525 )

I am looking for someone who can design FPGA mining bitstreams . I'm looking for someone who can work with me long term . This is a very serious project. Use vivado to a makea bitstream for vu9p fpga card with pcie,like xilinx vcu1525 and make a mining software compatible with windows/linux that works with the JTAG/UART interface over USB. FPGA should be capable of mining with reasonable performance Developer should commit to Non disclosure agreement, and is not allowed to share the code with 3rd parties without written confirmation from the project investor. Expected performance 22 kh/s / 250 watts power. Developer then send the end solution, including code base, compiled code, written documentation about how to upload the code to ( by developer specified) FPGA and how to use it, including clear written instructions how to change parameters like username, mining pool and so on. Source code and FPGA translated code is property of the investor, as is also the documentation and all parts of the project after project has been completed. The project will contain 3 parts : Vivado Bitstream Project ( verilog ) , Mining Interface , PC Mining program. All these must be coded by you ( the developer ). I will accept your bid only if you agree to the terms above including hashrate and power usage. I repeat , I am looking for someone to work with on long term . So please do your best to complete this work and I might offer you a permanent job.