Digital Verilog Time sensitive

$10-50 USD

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$10-50 USD

Plačilo ob dostavi

1) Frequency divider by - / 2n - / by any integer 2) Serial Peripheral Interface (SPI) - Both master and slave 3) UART TX/RX - Asynchronous serial communication - Start bit, Stop bit, over sampling etc. - Exercise on cross-clock domain synchronizer What to submit - RTL code (.v) with inline comment - Test bench (.v) with inline comment - Timing diagram (gtkwave) with annotation - Rough description of the corresponding circuit Quick turnaround needed

Verilog / VHDL

Electronics

Electrical Engineering

Microcontroller

ID projekta: 35472115

Več o projektu

6 ponudb

Projekt na daljavo

Aktivno pred 1 letom

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Dodeljeno:

@Hbs3401

Hi Sir, I read your project detail. It's about to make frequency divider, spi and uart protocol designing, so I have knowledge of both digital and Verilog language and also system Verilog so i can do your project. Please give me chance i will give my best. We can discuss price in chat. If you interested then please contact me. I am waiting for your response. Thank you Harsh

$35 USD v 7 dneh

4,8

(1 ocena)

1,0

6 freelancerjev je oddalo ponudbo s povprečno vrednostjo $34 USD za to delo

@iquicksolution

Hey there! I'm a professional electrical engineer having more than 4 years of experience in verilog. Share more details about the task over chat.

$50 USD v 1 dnevu

4,9

(100 ocen)

6,4

@Engrusman877

Hi There, I am a senior PhD Level Expert and Have more than 5 years of experience in verilog and VHDL coding. Just check my profile and share your details. Time and Budget will be discussed. Thanks

$30 USD v 7 dneh

4,8

(82 ocen)

6,0

@bipinmandal736

I am a final year student from the Department of Electronics and Electrical Communication Engineering. This is the domain of my interest. I shall be able to do this in a few hours. I have more than 2 years of continuous experience of working with Verilog and VHDL. I am in great touch. You can check if you want.

$30 USD v 1 dnevu

5,0

(21 ocen)

4,7

@Netrapug

I am verilog expert with more than 8 years of experience in designing digital circuits. I am very much excited to work for your project with 100% dedication. I have wide experience in designing frequency divider by 2n, SPI, UART Rx/Tx and taking care of clock domain crossing. lets start the work ASAP after discussing detailed requirements through messages.

$30 USD v 7 dneh

5,0

(10 ocen)

4,2

@aaliyahnza

Valuable client I'm expert electrical engineer with more than 4 years of experience in Verilog coding. I have go through requirements. But, i have few questions in my mind. The turn around will be according to your deadline. Looking forward to hearing from you Thanks

$30 USD v 1 dnevu