Do VHDL project on the ModelSim

Zaprto Objavljeno pred 5 letoma/leti Plačilo ob prevzemu
Zaprto Plačilo ob prevzemu

I want to do a VHDL project on ModelSim, all what you need will be in the attached document, i will need a report for the whole project ( explaining every file in the project and what it does ). I want phase 1 ( Design ) ASAP and the rest of the project within a week ( Maximum 10 days ). Please read the document carefully and if you have any questions contact me. Specify your price and time required to do the job.

Elektro inženiring Elektronika Inženiring FPGA Verilog / VHDL

ID projekta: #16730453

Več o projektu

9 predlogov Oddaljen projekt Aktiven pred 5 letoma/leti

9 freelancerjev ponuja v povprečju za $158 na tem delu

JinDongZhe

Hello , How are you? I just saw your project description carefully. I am very interested in your project. I have rich experience in vhld,fpga,digital circuit. I am a full time developer and can work for you for a l Več

$120 USD v 10 dneh
(77 ocen)
6.2
kulwantsingh16

A proposal has not yet been provided

$200 USD v 10 dneh
(15 ocen)
4.2
RajanKaneria

Hey, I am Mrs. Arohi. Currently I m Working at Indian Space Research Organization, India. I Have Good Grip on VHDL, VLSI, . Kindly Ping Me If You are Interested to Discuss.

$83 USD v 10 dneh
(0 ocen)
0.0
munawar52

I am electrical engineer and do your verilog based project.I am also expert in MATLAB AND VERILOG VHDL.

$83 USD v 10 dneh
(0 ocen)
0.0