need a VHDL expert asap

$10-30 AUD

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pred več kot 6 leti

$10-30 AUD

Plačilo ob dostavi

vhdl expert needed asap to run a code

Electrical Engineering

ID projekta: 16042366

Več o projektu

15 ponudb

Projekt na daljavo

Aktivno pred 6 leti

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15 freelancerjev je oddalo ponudbo s povprečno vrednostjo $25 AUD za to delo

@ducdctoandh

I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. Relevant Skills and Experience FPGA/VHDL/Verilog Proposed Milestones $20 AUD - the whole task

$20 AUD v 1 dnevu

4,9

(89 ocen)

6,4

@SqUa11

A proposal has not yet been provided

$30 AUD v 1 dnevu

5,0

(76 ocen)

5,5

@mastor31

Hi, I am good in VHDL and verilog. Please elaborate your requirement to proceed further. Regards, Chhanda Relevant Skills and Experience I have more than 7 years experience in FPGA and PLD field. I worked in ISE, vivado, quartus, lattice diamond. Proposed Milestones $30 AUD - Share the corrected code

$30 AUD v 1 dnevu

5,0

(17 ocen)

5,0

@quandangvan

A proposal has not yet been provided

$30 AUD v 3 dneh

4,8

(16 ocen)

4,8

@shobhitkapoor

Not for Money ! Only for Good Feedback to Increase the rating . Relevant Skills and Experience VHDL , Verilog Proposed Milestones $15 AUD - complition

$15 AUD v 1 dnevu

4,8

(18 ocen)

4,5

@olegkaravaev84

I have more than 10 years of experience in the FPGA/ASIC design. I think I can help you

$30 AUD v 1 dnevu

5,0

(10 ocen)

3,9

@kulwantsingh16

A proposal has not yet been provided

$20 AUD v 2 dneh

4,6

(15 ocen)

4,2

@Starkindustries

HI Sir i have experience in VHDL and VLSI. Come to chat to discuss i am confident i can complete this job. waiting for your reply thanks Relevant Skills and Experience Electrical Engineering, Electronics, Engineering, FPGA, Verilog / VHDL Proposed Milestones $25 AUD - project

$25 AUD v 1 dnevu

5,0

(3 ocen)

2,2

@vaibhavl

A proposal has not yet been provided

$30 AUD v 2 dneh

0,0

(0 ocen)

0,0

@hag5a467805e1a44

A proposal has not yet been provided

$25 AUD v 1 dnevu

0,0

(0 ocen)

0,0

@vlsidude1

I have expertise in ASIC Design flow, HDL(Verilog,VHDL,System Verilog), Digital Deisgn with 4+ yrs of experience. Relevant Skills and Experience I have expertise in ASIC Design flow, HDL(Verilog,VHDL,System Verilog), Digital Deisgn, Processor Design, Verification(UVM) and have a Masters degree from a premier university. Proposed Milestones $20 AUD - Complete

$20 AUD v 1 dnevu