Verilog / VHDL Dela in natečaji

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers.
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Projekt/Natečaj Opis Ponudbe/Vnosov Znanja Pričeto Se konča Cena (EUR)
Help Business for us Looking forward someone who can help me Please don't hesitate contact me if you are interested Thanks 2 Verilog / VHDL, Marketing, Reklamna sporočila, Business Intelligence Feb 25, 2018 Danes6dni 23ur €428
Controller for Logisim Calculator Hello, I have mostly created a 8-bit calculator for logisim however I am having difficulty with designing the correct controller for it. Please help correct my design. 9 Inženiring, Elektronika, Verilog / VHDL, Elektro inženiring, Oblikovanje tokokrogov Feb 25, 2018 Danes6dni 10ur €34
logism expert needed expert in logism or electronic engineering please bid 7 Inženiring, Elektronika, Matlab and Mathematica, Verilog / VHDL, Elektro inženiring Feb 25, 2018 Danes6dni 7ur €16
Mpi Programming Mpi Programming in simple way. 6 C programiranje, Java, Verilog / VHDL, C++ programiranje, Sestavljanje mehanizacije Feb 24, 2018 Feb 24, 20185dni 10ur €20
Implement RSA algorithm synthesized code (512 bit) in Verilog Hi, I would like to implement RSA algorithm synthesized code in Verilog up to 512 bit of encryption. - Encryption data output size can vary from 16-bit to 512 bits. - Prime number generation: two random prime number generated through LFSR and should be stored in FIFO - For every iteration different public and private key pairs should be produced. Kindly cont... 6 Inženiring, Verilog / VHDL, FPGA Feb 24, 2018 Feb 24, 20185dni 2ur €119
Design a Circuit Board *** Need expert in Kicad software****... i have attached all details of work in the word file take a look at this and let me know if you can do this work 4 Elektronika, Verilog / VHDL, Elektro inženiring, Oblikovanje tiskanih vezij v PBC, Oblikovanje tokokrogov Feb 24, 2018 Feb 24, 20185dni 1ur €76
Help Business Looking forward someone who can help me Please don't hesitate contact me if you are interested Thanks 7 Verilog / VHDL, Marketing, Reklamna sporočila, Business Intelligence Feb 23, 2018 Feb 23, 20184dni 22ur €337
Build a simulink model of the DC motor Build a simulink model of the DC motor 20 Inženiring, Elektronika, Matlab and Mathematica, Verilog / VHDL, Elektro inženiring Feb 22, 2018 Feb 22, 20183dni 20ur €37
Build me a computer architecture project Will need to implement parallel programming including CUDA in C++. Details to follow if anyone takes up the challenge. Hardware details to be taken care by our team. 9 C programiranje, Java, Verilog / VHDL, Arhitektura porgramske opreme, C++ programiranje Feb 22, 2018 Feb 22, 20183dni 19ur €151
QPSK FPGA Demodulator xilinx (Source code required) We need to develop a QPSK demodulator FPGA xilinx based. 14 Elektronika, Verilog / VHDL, Mikrokontroler, Elektro inženiring, FPGA Feb 22, 2018 Feb 22, 20183dni 10ur €589
DDR3 memory controller interface using nexys video for read write multiple images We are working on nexys video board and we are trying to access DDR3 memory using IPCORE in vivado design suite software. We want to read and write data into DDR3 memory using nexys video board. 4 C programiranje, Verilog / VHDL, Mikrokontroler, Vgrajena programska oprema, FPGA Feb 21, 2018 Feb 21, 20182dni 6ur €123
2x2 multiplier using karatsuba algorithm implementation of 2x2 multiplier using karatsuba algorithm 11 Java, Matlab and Mathematica, Verilog / VHDL, Algorithm, C++ programiranje Feb 21, 2018 Feb 21, 20182dni 3ur €21
SystemVerilog - Complete Single-Cycle Processor + Synthesis I need help completing a Single Cycle RISC-V datapath and control using System Verilog. What I need: - A report including how different instructions have be to implemented. The document contains all the necessary modifications in the datapath to add all the instructions. - Modify the code to implement all the instructions. 6 Inženiring, Elektronika, Verilog / VHDL, Elektro inženiring Feb 20, 2018 Feb 20, 20181dni 3ur €52
DDR3 Memory controller interface using nexys video board We are working on nexys video board .We are trying to access DDR3 memory using IP core in Vivado design suit [url removed, login to view] want to read and write the data into DDR3 memory and access it in nexys video board. 5 C programiranje, Elektronika, Verilog / VHDL, Mikrokontroler, Arduino Feb 19, 2018 Feb 19, 20181ur 27minut €289
Verilog Servo controller I'm looking for someone who can write me a verilog HDL code for a servo controller 7 C programiranje, Verilog / VHDL, Mikrokontroler, Elektro inženiring, FPGA Feb 18, 2018 Feb 18, 2018Končano €23
AI Based Chip Design For video codec h.264 for face recognition in cloud and verify output on Xilinx FPGA Kit write an AI Algorithm for video codec h.264 and design Chip, after design chip of AI Based video codec h.264 you can verify out put on Xilinx FPGA Kit for face recognition in cloud iam expecting this project to finish on or before 26th feb2018 regards D RAMANNA [Removed by Freelancer.com Admin for offsiting - please see Section 13 of our Terms and Conditions] BANGALORE-INDIA 4 Grafično oblikovanje, Oblikovanje logotipov, Elektronika, Verilog / VHDL, Elektro inženiring Feb 18, 2018 Feb 18, 2018Končano €134
Electronic Engineer We require an electronic engineer who is skilled in: FPGA Programming (VHDL) PicoBlaze embedded processor (Assembler) DWIN Technology TouchScreen 7 C programiranje, Elektronika, Verilog / VHDL, Mikrokontroler, Elektro inženiring Feb 16, 2018 Feb 16, 2018Končano €25
FPGA Based NMR Spectrometer design Need to design a FPGA based NMR Spectrometer for NMR Applications. Phase 1 : Interface high speed ADC and DAC with Altera FPGA and write the software for generating RF pulses and Capture Echo Signal from ADC. See the attached similar work for more details. 10 Elektronika, Verilog / VHDL, Mikrokontroler, Elektro inženiring, FPGA Feb 16, 2018 Feb 16, 2018Končano €6452
Design an analog to digital convereter Aim is to design a successive approximation register based analog to digital converter using cadence tool (any vlsi back end tool) 10 Inženiring, Elektronika, Verilog / VHDL, Mikrokontroler, Elektro inženiring Feb 16, 2018 Feb 16, 2018Končano €814
adc ltc2308 in vhdl altera deo nano soc cyclone 5 board It is a basic project but since I've never worked with on FPGA before, I think someone with experience is a wise choice. The project is basically read the ADC signal from onboard adc ltc2308 and send it to the DAC. While ADC (ltc2308 ) is 12bit 7 Elektronika, Verilog / VHDL, Mikrokontroler, Elektro inženiring, Oblikovanje tokokrogov Feb 12, 2018 Feb 12, 2018Končano €66
need someone for FPGA work I would like someone to help me build a simple FPGA Kernel for a certain gaming system. I would like your help to improve a FPGA project we are using Altera Quartus programming software i have attached a QAR file First of all, compile it to a POF file and then send it to me and let me examine it and I will give you more instructions on how to proceed. It's not very complicated Let me ask... 9 C programiranje, Elektronika, Verilog / VHDL, Mikrokontroler, FPGA Feb 12, 2018 Feb 12, 2018Končano €125
An expert in FPGA is required I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 4 C programiranje, Verilog / VHDL, Mikrokontroler, Elektro inženiring, FPGA Feb 12, 2018 Feb 12, 2018Končano €121
FPGA QAR Project I have a QAR file that I cannot compile into a POF or PLD file, I would like someone with experience in FPGA to do it. It must be someone with real good knowledge of FPGA. 14 Elektronika, Verilog / VHDL, Mikrokontroler, Elektro inženiring, FPGA Feb 12, 2018 Feb 12, 2018Končano €400
Help with plptools needed need perfect work Help with plptools needed need perfect work.. All the details would be given on the chat... Need to submit it till midnight today... 2 Matlab and Mathematica, Verilog / VHDL, Mikrokontroler, Matematika, , Sestavljanje mehanizacije Feb 11, 2018 Feb 11, 2018Končano €61
FPGA work .... I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 5 C programiranje, Elektronika, Verilog / VHDL, Mikrokontroler, FPGA Feb 11, 2018 Feb 11, 2018Končano €22
FPGA CONSOLE I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 5 C programiranje, Elektronika, Verilog / VHDL, Mikrokontroler, FPGA Feb 11, 2018 Feb 11, 2018Končano €17
OFDM/256QAM Modulation/Demodulation and Forward Error Correction in Matlab/Xilinx FPGA IP We are looking for develop and implement OFDM / 16QAM, 32QAM, 64QAM , 256QAM Modulation / Demodulation algorithm with Matlab and implement it on Xilinx Zynq FPGA . 1- BW : tunable upto 40Mhz . 2- FEC : LDPC or Reed solomon . 11 Inženiring, Matlab and Mathematica, Verilog / VHDL, Elektro inženiring, LabVIEW Feb 9, 2018 Feb 9, 2018Končano €2137
Use edaplayground to run a carry lookahead adder need a 4-bit carry look ahead adder to be coded in system Verilog using edaplayground. 1) write system Verilog model for CLA 2) parameterize for N bits 3) generate/write test bench that works 11 C programiranje, Verilog / VHDL, Mikrokontroler, Arhitektura porgramske opreme, FPGA Feb 8, 2018 Feb 8, 2018Končano €19
Controller (Microprocessor Based) Design for Transport Refrigeration System Design , Prototyping of Controller (Microprocessor Based) Design for Transport Refrigeration System to control a system powered by diesel engine based power train and comprising of a Vapour Compression Cycle Refrigeration System comprising of Refrigeration Compressors , Condensors ,Evaporators , heaters etc 7 Elektronika, Verilog / VHDL, Elektro inženiring, Oblikovanje tiskanih vezij v PBC, Oblikovanje tokokrogov Feb 8, 2018 Feb 8, 2018Končano €546
Steganography - open to bidding I need a C# based Desktop Applications With Following Modules The Encryption Module 1. Registration: - To access the core system, user first need to register themselves by providing required details. 2. Login: - After registration, user may login into the system. 3. Algorithm Selection: - Here, user will select the algorithm such as DES (Data Encryption Standard), AES (Advance Encryption Standa... 7 Matlab and Mathematica, Verilog / VHDL, Algorithm, Oblikovanje tiskanih vezij v PBC, Strojno učenje Feb 7, 2018 Feb 7, 2018Končano €218
CONFIGURATION OF ADS 5263 EVM WITH ZC702 OR KC705. i have ADS5263 EVM board, and i connected that board with xilinx zc702 via ADC FMC adapter. i tried to write code for that i failed to generate bit stream based on xilinx application note xapp524. i need help to sort out the problem of clock multi region routing. 5 Verilog / VHDL Feb 6, 2018 Feb 6, 2018Končano €122
integration wsn with clouds using cooja i want a specialist in cloud integration with wsn and have experience in cooja. 9 Java, Inženiring, Matlab and Mathematica, Verilog / VHDL, C++ programiranje Feb 6, 2018 Feb 6, 2018Končano €83
FIR Filter Reference Design in Verilog We are looking for a FIR filter design in Verilog with the following requirements: - 16-bit input, 16-bit fixed coefficient - 39-bit output - 256 taps Please provide 2 implementations: 1. serial implementation using 1 multiplier 2. partial parallel implementation with 4 multiplers 5 Verilog / VHDL, FPGA Feb 4, 2018 Feb 4, 2018Končano €179
Simple MIPS interpretor Want someone to finish a MIPS project. The project will be required to be finished by the end of the day 8 C programiranje, Verilog / VHDL, Arhitektura porgramske opreme, Sestavljanje mehanizacije, x86 / x64 monter Feb 4, 2018 Feb 4, 2018Končano €42
Recursive karatsuba multiplier (16bit) I need a verilog code for recursive karatsuba multiplier for 16bit signed integers. 6 Verilog / VHDL, Digitalno oblikovanje Feb 2, 2018 Feb 2, 2018Končano €158
Pthread and OpenMP I have some simple code that I want to compare in OpenMP and pThread to see which is more performant. 1 C programiranje, Java, Verilog / VHDL, C++ programiranje, Sestavljanje mehanizacije Jan 31, 2018 Jan 31, 2018Končano €28
dead reckoning Indoor positioning system we want to develop an indoor positioning system using pedestrian dead reckoning method. we are using STM32F469NI microcontroller. using only accelerometer and gyroscope. we have successfully collected the data for accelerometer and gyroscope. so is it possible to employ these data in embedded platform (keil u-vission) to develop the system. other possibility is to save the data in SD card and use ... 15 Matlab and Mathematica, Verilog / VHDL, Elektro inženiring, LabVIEW, Arduino Jan 30, 2018 Jan 30, 2018Končano €160
Petalinux on ZC706 I am looking for someone who has done work on Petalinux on ZC706 or Zedboard. The person MUST have done projects of Ethernet, PS Ram usage, external permanent memory storage using PCIe based drive, SPI control. I need to develop a project using above features. 1 Verilog / VHDL, FPGA Jan 29, 2018 Jan 29, 2018Končano €135
ddr sdram controller i want to do some modification to controller i.e either adding a module to it or pipeling it. 3 Verilog / VHDL Jan 20, 2018 Jan 20, 2018Končano €183
build a mips recursive quicksort use recursive way to write quicksort in mips, the c code will be offered 9 C programiranje, Verilog / VHDL, C++ programiranje, Sestavljanje mehanizacije, x86 / x64 monter Jan 17, 2018 Jan 17, 2018Končano €33
Matlab Simulation-Impulse Voltage generation Need to modify a schematic(.mdl) to get desired results. The .mdl schematic is attached [url removed, login to view] need to modify the design to get proper output like Figure 4 12 Inženiring, Elektronika, Matlab and Mathematica, Verilog / VHDL, Elektro inženiring Jan 10, 2018 Jan 10, 2018Končano €34
need a VHDL expert asap vhdl expert needed asap to run a code 16 Inženiring, Elektronika, Verilog / VHDL, Elektro inženiring, FPGA Jan 10, 2018 Jan 10, 2018Končano €16
License Plate Detection Using VHDL I'm building a license plate detection system, and concept has been proven using MATLAB. The current challenge is to implement the design on an Altera DE Board FPGA using VHDL. At this point, because of time constraints I like to ask for ur assistance in the following areas I seek someone who could help Implement the design on an FPGA. Attached is the matlab code 8 Elektronika, Matlab and Mathematica, Verilog / VHDL, Elektro inženiring, FPGA Jan 9, 2018 Jan 9, 2018Končano €464
Edge detection on Altera DE2-115 Hello, i want to create project using altera DE2-115 board to detect edges on 3 image using sobel filter and show they ober VGA 640x480. To choose which image should be apear is needed 2 swtich. i have done some algorithm with matlab and now i have to implement it on altera. Thanks 16 Elektronika, Matlab and Mathematica, Verilog / VHDL, Elektro inženiring, LabVIEW Jan 6, 2018 Jan 6, 2018Končano €523
This task need to be developed using MATLAB....A cicuit bsed on fuzzy logic to detect different kind of faults L-G,L-L,LLL etc. Fuzzy logic based fault detection 9 Inženiring, Matlab and Mathematica, Verilog / VHDL, Algorithm, Elektro inženiring Jan 6, 2018 Jan 6, 2018Končano €28
SFP communication with FPGA Coding required for FPGA to SFP communication 13 Elektronika, Verilog / VHDL, Mikrokontroler, Elektro inženiring, FPGA Jan 6, 2018 Jan 6, 2018Končano €729
VHDL for programming FPGA board Hi, I run a small sales business in the video game industry. I am looking for someone with VHDL experience to assign pins on an FPGA board for an old video game system, to a new pre-designed break out board to allow the system to use HDMI. Please contact for details. 18 Verilog / VHDL, FPGA Jan 2, 2018 Jan 2, 2018Končano €103
FPGA Design in VHDL Design of FPGA to serve as a memory mapped resource for a local processor module. The processor interface is a memory mapped address/data bus. The FPGA design contains registers, counters and data path functions. System clock frequency is 25MHz. No internal processor is used within the FPGA. An external SRAM is required for expanded data storage. The target FPGA is the Microsemi ProASIC3E. 10 Verilog / VHDL, Design Jan 2, 2018 Jan 2, 2018Končano €5554
Project for Varun V. Hi Varun V., I noticed your profile and would like to offer you my project. We can discuss any details over chat. 1 C programiranje, Linux, Verilog / VHDL, Vgrajena programska oprema, Jan 1, 2018 Jan 1, 2018Končano €203
Work with Digital Electronic and Analogue... Analysis and design combinational and sequential digital logic, modeling concurrent digital systems using VHDL and Analogue filter. 11 Elektronika, Matlab and Mathematica, Verilog / VHDL, Elektro inženiring Dec 28, 2017 Dec 28, 2017Končano €21
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